TSMCファウンドリー
DFT Engineer
- 勤務地神奈川県横浜市 / 大阪府大阪市
- デバイス・プロセス・設計設計検証・DFT
- 中途
仕事内容
Job Description
- Defect modeling and test methodology development for advanced process nodes, advanced packaging technologies • Perform top/block-level DFT insertion including scan compression, boundary scan, 1500 wrapper, ATPG and pattern simulation • Verify DFT circuitry and interface with other blocks, debug timing simulation issues • Closely work with physical design team to resolve timing constraints/issues • Be able to quickly understand problem statements and innovate solutions for DFT, diagnosis and yield learning • Work independently and own the task from DFT specification to final pattern delivery
Qualification • BCH and above in EE, CS related fields. • 3-15 years of hands-on experience with DFT and test flow with commercial EDA tools for large and complex SOCs • Strong fundamental knowledge of DFT techniques include JTAG, ATPG, yield learning, logic diagnosis, Scan compres...
応募条件
必須
- BCH and above in EE, CS related fields.
- 3-15 years of hands-on experience with DFT and test flow with commercial EDA tools for large and complex SOCs • Strong fundamental knowledge of DFT techniques include JTAG, ATPG, yield learning, logic diagnosis, Scan compres...
勤務条件
- 勤務地
- 神奈川県横浜市 / 大阪府大阪市