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TSMCファウンドリー

IO Cell Designer

  • 勤務地神奈川県横浜市
  • デバイス・プロセス・設計EDA・PDK・設計基盤
  • 中途
公式募集要項を開く（新しいタブ）公式応募ページ（新しいタブ）

公式ページ 2026/10/04 時点当サイト掲載 2026/06/26

仕事内容

Job scope : 1.Advanced (FINFET/Nanosheet), specialty, automotive, 2.5D/3D chiplet IO circuit design (w/ built-in circuit co-optimized ESD protection) 2. IO testchip design & library timing/power kits characterization. Qualifications (Education, Skills, Certificates, etc.) : 1. EE/Physics MS or above (PhD is preferred) with following one (or multi-) technical knowledge & expertise - Semiconductor device - Analog/digital/RF/power circuit - Signal/power integrity, IREM and timing analysis & sign-off - ESD protection All qualified applicants will receive consideration for employment without regard to race, color, religion, sex, sexual orientation, gender identity, national origin, or disability.

応募条件

必須

  • (Education, Skills, Certificates, etc.) :

歓迎

  • EE/Physics MS or above (PhD is preferred) with following one (or multi-) technical knowledge & expertise - Semiconductor device - Analog/digital/RF/power circuit - Signal/power integrity, IREM and timing analysis & sign-off - ESD protection All qualified applicants will receive consideration for employment without regard to race, color, religion, sex, sexual orientation, gender identity, national origin, or disability.
募集要項の原文

Qualifications (Education, Skills, Certificates, etc.) : 1. EE/Physics MS or above (PhD is preferred) with following one (or multi-) technical knowledge & expertise - Semiconductor device - Analog/digital/RF/power circuit - Signal/power integrity, IREM and timing analysis & sign-off - ESD protection All qualified applicants will receive consideration for employment without regard to race, color, religion, sex, sexual orientation, gender identity, national origin, or disability.

勤務条件

勤務地
神奈川県横浜市

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